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Junction Technology Group - Proceedings

July 2009
Topic: Update on Advanced Metrologies and Processing for CMOS Junction Formation

SST Video Clip:
http://link.brightcove.com/services/player/bcpid29605469001?bctid=29661173001

Metrologies 1:
Thermal Processing Issues For 22nm Node Junction Scaling
(2.6MB pdf)
- John Borland, JOB Technologies

Implant Process Characterization With the Modern In-line Metrologies (1.4MB pdf)
- Mark Benjamin, Semilab

Part 1: Optical Reflection Metrologies for Junctions and 4PP: Obsolete or Timeless? (992K pdf)
-Walt Johnson, KLA-Tencor
Part 2: Activation & EOR Monitoring Using Therma-Probe (729K pdf)
-Alex Salnik, KLA-Tencor

Processing:
Cluster Boron Implants for <10 nm Junctions
(1.7MB pdf)
- Wade Krull, SemEquip

Flexibly Shaped Pulse (FSP) Flash Annealing (1.2MB pdf)
- Peter Nunan, DNS

CMOS Leakage Reduction Using Laser Spike Annealing (1.4MB pdf)
- Jeff Hebb, Ultratech

Metrologies 2:
Metrology Methods for Analysis of Advanced Junctions (458K pdf)
- Temel Buyuklimanli, EAG

Differential Hall Effect in Advanced FEOL Structures (1.5MB pdf)
- Si Prussin, UCLA

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